Answer:
Hey there, I think you can draw this! I believe in you!
Ill assist by describing it with a text representation to guide you!
When the clock signal is high, a D-Latch stores one bit of data (also called level-triggered). It has one output, Q, and two inputs, D (for "data") and CLK (for "clock").
To make a memory with 4 bits, we need to use four D-Latches, each of which stores one bit. We can show this in text form as follows:
D0 ----> D-Latch0 ----> Q0
D1 ----> D-Latch1 ----> Q1
D2 ----> D-Latch2 ----> Q2
D3 ----> D-Latch3 ----> Q3
Each D-Latch (D-Latch0 through D-Latch3) represents one bit of the 4-bit memory. The D inputs of each D-Latch are connected to the data inputs (D0 through D3). The bit of memory that is stored is shown by the output of each D-Latch (Q0–Q3).
To store a 4-bit value, set the data inputs (D0 to D3) to the value you want and set the clock signal (CLK) to high. The value will be saved in the D-Latches, and the 4-bit memory output can be read from Q0 to Q3.
A 4-bit memory can be made by connecting four D-Latches in parallel, with each D-Latch storing one bit. The data inputs (D0–D3) show the 4-bit value that was sent in, and the outputs (Q0–Q3) show the 4-bit value that was stored in the memory.
Hope this helps!